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PCIType1Info

Declaration

typedef struct {
ulong BaseAddress10;
ulong BaseAddress14;
uchar PrimaryBusNumber;
uchar SecondayBusNumber;
uchar SubordinateBusNumber;
uchar SecondaryLatencyTimer;
uchar IOBase;
uchar IOLimit;
ushort SecondaryStatus;
ushort MemoryBase;
ushort MemoryLimit;
ushort PrefetchableMemoryBase;
ushort PrefetchableMemoryLimit;
ulong PrefetchableBaseHi;
ulong PrefetchableLimitHi;
ushort IOBaseHi;
ushort IOLimitHi;
uchar CapabilitiesPointer;
uchar reserved1;
uchar reserved2;
uchar reserved3;
ulong ROMBaseAddress;
uchar InterruptLine;
uchar InterruptPin;
ushort BridgeControl;
} PCIType1Info

Prototype In

pcilib.h

Description

Structure defining PCI to PCI bridge (type 1) PCI configuration register layout. We use this in the PCIDeviceInfo union so we can describe all types of PCI configuration spaces with a single structure.

Members

BaseAddress10 | Base address register (BAR) 10h
BaseAddress14 | Base address register (BAR) 14h
PrimaryBusNumber | Primary bus number this bridge lives on
SecondayBusNumber | Secondary bus number this bridge controls
SubordinateBusNumber | Subordinate bus number for this bridge
SecondaryLatencyTimer | Secondary latency timer
IOBase | I/O base address for bridge control registers
IOLimit | I/O limit for bridge control registers
SecondaryStatus | Secondary status
MemoryBase | Memory mapped base address for bridge control registers
MemoryLimit | Memory mapped limit for bridge control registers
PrefetchableMemoryBase | Base of pre-fetchable memory on bus
PrefetchableMemoryLimit | Length of pre-fetchable memory on bus
PrefetchableBaseHi | High portion of prefetchable base value
PrefetchableLimitHi | High portion of prefetchable limit value
IOBaseHi | High value of I/O base address
IOLimitHi | High value of I/O limit
CapabilitiesPointer | Pointer to PCI bridge capabilities list
reserved1 | Reserved: not used for this device type
reserved2 | Reserved: not used for this device type
reserved3 | Reserved: not used for this device type
ROMBaseAddress | Address if ROM for bridge (if any)
InterruptLine | Interrupt line assigned to this device
InterruptPin | Interrupt pin assigned to this device
BridgeControl | Bridge control register

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